Publications
"Strained SiGe and Si FinFETs for High Performance Logic with SiGe/Si Stack on SOI", International Electron Devices Meeting, San Francisco, CA, IEEE, 2010.
, "Strain effects on three-dimensional, two-dimensional, and one-dimensional silicon logic devices: Predicting the future of strained silicon", Journal of Applied Physics, vol. 108, no. 9, pp. 093716-24, 11/2010.
, "Critical Discussion on (100) and (110) Orientation Dependent Transport: nMOS Planar and FinFET", Symposium on VLSI Technology, Kyoto, Japan, 2011.
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