Publications
"Strained SiGe and Si FinFETs for High Performance Logic with SiGe/Si Stack on SOI", International Electron Devices Meeting, San Francisco, CA, IEEE, 2010.
, "Strain Additivity in III-V Channels for CMOSFETs beyond 22nm Technology Node", 2008 VLSI Symposium on VLSI Technology, pp. 182-183, October, 2008.
, "Critical Discussion on (100) and (110) Orientation Dependent Transport: nMOS Planar and FinFET", Symposium on VLSI Technology, Kyoto, Japan, 2011.
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