|Title||CMOS-MEMS resonator as a signal generator for fully-adiabatic logic circuits|
|Publication Type||Conference Paper|
|Year of Publication||2005|
|Authors||He, M., M. P. Frank, and H. Xie|
|Conference Name||Smart Structures, Devices, and Systems IIProceedings of SPIE|
|Conference Location||Sydney, Australia|
Fully-adiabatic (thermodynamically reversible) logic is one of the few promising approaches to low-power logic design. To maximize the system power-performance of an adiabatic circuit requires an ultra low-loss on-chip clock source, which can generate an output signal with a quasi-trapezoidal (flat-topped) voltage waveform. In this paper, we propose to use high-Q MEMS resonators to generate the custom waveform. The big challenge in the MEMS resonator design is that a non-sinusoidal (quasi-trapezoidal)waveform needs to be generated even though the resonator oscillates sinusoidally. Our solution is to customize the shape of the sensing comb fingers of the resonator, with the result that the sensing capacitance varies quasi-trapezoidally. The effective quality factor and the area-efficiency of the microstructure have been optimized so as to minimize the whole system"s power dissipation and cost at a given frequency. A resonator design with a 100 kHz resonant frequency based on a standard TSMC 0.35µm CMOS process has been fabricated. The resonator has an area of 300 µm by 160 µm with a thickness of 30 µm. Three-dimensional field simulation shows that the resonator generates a quasi-trapezoidal waveform when it operates at its resonance. An on-chip buffer is also designed for monitoring the waveform generated by the MEMS resonator. The post-CMOS fabrication process is compatible with standard CMOS processes. Thus the custom clock generator can be integrated with logic circuits on the same CMOS chip. The size of the MEMS resonator can be further reduced by design optimization and advances in micro/nano-fabrication technology.